Reduction of Static Power Consumption in VLSI Devices and Systems

Power consumption is a topic of major debate these days, be it at a grand level like in Big Industrial application or at small level like in Electronic Circuits. Now a day almost all the electronics devices contains VLSI chip(s). VLSI plays a very important role in today’s day-to-day life of global citizen.

With the technical advancements in the VLSI technology, technology node & hence circuit size keeps on shrinking. With smaller technology nodes, power consumption becomes a major parameter in any VLSI design. Smaller technology nodes, while helps in attaining a lower foot print of the system, results in increased power consumption in a given chip.

A Brief History of VLSI Technology, part 1 - SemiWiki

Any best vlsi training institute would know that there are two types of power consumption in any Chip. One is the static power (leakage) & other one is the dynamic power (switching & short-circuit).

Dynamic power gets consumed whenever chip does its defined function(s). However Static power consumption happens irrespectively of chip doing any useful functions.

Lower the static power consumption of the chip, better it is from power point of view.

Various techniques can be adopted to lower the static power consumption in any given design to execute a given set of functionality.

1. No over use of technology:- If the given functionality is not demanding use of the latest (smaller) technology node, the more suitable technology node should be used to satisfy the design needs. Remember, smaller the technology node, higher is the static power consumption.

2. Operating at lower temperature:- As temperature of the VLSI chip increases, static power consumption increases (due to higher leakage current). Hence in any system design, VLSI chips should be operated at lower temperature & not close to the maximum temperature specified by the Chip vendor. The best possible case is to operate the chip at close to the ambient temperature, wherever possible. Various thermal techniques in the system design can be adopted to achieve this.

3. Power shut a block: If a block is not required for a given operation and for a given period of time, it should be shut down to save static power as well as dynamic power. Doing this operation adds some logic overhead & some complexity to the chip in design & layout, but it will probably payoff over the entire life span of the system in terms of power saving & increased reliability (because of less heat generation due to shutting the block when not in use), if justified by target volumes of the Chip.

Exception to this will be those blocks which needs to be operated more frequently and shutting down & bringing it up may require complex protocols & training sequences etc. to be run for each such operation.

All of the above techniques are based on the usages of the VLSI technology & Chips. With these techniques static power consumption can be reduced significantly. Less power requirement may help in using smaller battery for portable device applications. These techniques may also result in reduced device cost.